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c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 a n p e c r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o i m p r o v e r e l i a b i l i t y o r m a n u f a c t u r a b i l i t y w i t h o u t n o t i c e , a n d a d v i s e c u s t o m e r s t o o b t a i n t h e l a t e s t v e r s i o n o f r e l e v a n t i n f o r m a t i o n t o v e r i f y b e f o r e p l a c i n g o r d e r s . 2 4 v , 3 a d c - d c s y n c h r o n o u s b u c k c o n v e r t e r a p w 8 8 3 5 f e a t u r e s g e n e r a l d e s c r i p t i o n l c d m i n i t o r / t v s e t - t o p b o x d s l , s w i t c h h u b n o t e b o o k c o m p u t e r a p w 8 8 3 5 i s a 3 a s y n c h r o n o u s b u c k c o n v e r t e r w i t h i n t e - g r a t e d p o w e r m o s f e t s . t h e a p w 8 8 3 5 d e s i g n w i t h a c u r r e n t - m o d e c o n t r o l s c h e m e , c a n c o n v e r t w i d e i n p u t v o l t a g e o f 7 . 5 v t o 2 4 v t o t h e o u t p u t v o l t a g e a d j u s t a b l e f r o m 0 . 8 v t o 2 0 v t o p r o v i d e e x c e l l e n t o u t p u t v o l t a g e r e g u l a t i o n . t h e a p w 8 8 3 5 i s e q u i p p e d w i t h f o r c e p w m m o d e o p e r a t i o n . t h e a p w 8 8 3 5 i s a l s o e q u i p p e d w i t h p o w e r - o n - r e s e t , s o f t s t a r t a n d w h o l e p r o t e c t i o n s ( u n d e r - v o l t a g e , o v e r - v o l t a g e , o v e r - t e m p e r a t u r e a n d c u r r e n t - l i m i t ) i n t o a s i n g l e p a c k a g e . t h i s d e v i c e , a v a i l a b l e t d f n 3 x 3 - 1 0 p r o v i d e s a v e r y c o m - p a c t s y s t e m s o l u t i o n e x t e r n a l c o m p o n e n t s a n d p c b a r e a . wide input voltage range from 7.5v to 24v 3a continuous output current adjustable output voltage from 0.8v to 20v v ref =0.8v + 1% over all load & line regulation & tc range integrated high/low side mosfet high efficiency performance up to 95% scale low shutdown current <1 m a scale built-in internal 1.5ms soft-start & soft-stop functions fixed 600khz switching frequency with maximum 90% duty force pwm mode operation built-in current mode control for fast response & mlcc supports with internal stable with low esr capacitors power-on-reset detection on vcc & vin over-temperature protection over voltage protection current-limit protection with frequency foldback enable/shutdown function current-mode operation with internal compensation s i m p l i f i e d a p p l i c a t i o n c i r c u i t small tdfn3x3-10 packages lead free and green devices available (rohs compliant) a p p l i c a t i o n s apw 8835 vin 3 10 gnd 4 , 5 , 11 sw 6 , 7 fb 1 boot 8 v in v out vcc en 2 pgood 9 v cc
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 2 a p w 8 8 3 5 o r d e r i n g a n d m a r k i n g i n f o r m a t i o n n o t e : a n p e c l e a d - f r e e p r o d u c t s c o n t a i n m o l d i n g c o m p o u n d s / d i e a t t a c h m a t e r i a l s a n d 1 0 0 % m a t t e t i n p l a t e t e r m i n a t i o n f i n i s h ; w h i c h a r e f u l l y c o m p l i a n t w i t h r o h s . a n p e c l e a d - f r e e p r o d u c t s m e e t o r e x c e e d t h e l e a d - f r e e r e q u i r e m e n t s o f i p c / j e d e c j - s t d - 0 2 0 d f o r m s l c l a s s i f i c a t i o n a t l e a d - f r e e p e a k r e f l o w t e m p e r a t u r e . a n p e c d e f i n e s ? g r e e n ? t o m e a n l e a d - f r e e ( r o h s c o m p l i a n t ) a n d h a l o g e n f r e e ( b r o r c l d o e s n o t e x c e e d 9 0 0 p p m b y w e i g h t i n h o m o g e n e o u s m a t e r i a l a n d t o t a l o f b r a n d c l d o e s n o t e x c e e d 1 5 0 0 p p m b y w e i g h t ) . p i n c o n f i g u r a t i o n a b s o l u t e m a x i m u m r a t i n g s ( n o t e 1 ) symbol parameter rating unit v in vin supply voltage (vin to gnd) - 0.3 ~ 30 v v cc vcc supply voltage ( vcc to gnd) - 0.3~6.5 v > 20ns - 1 ~v in +0.3 v v sw sw to gnd voltage < 20ns - 3 ~ v in +3 v en, fb, pgood to gnd voltage - 0.3 ~ 6.5 v v boot boot to gnd voltage v sw - 0.3 ~ v sw +6 v p d power dissipation internally limited w t j junction temperature 150 o c t stg storage temperature - 65 ~ 150 o c t sdr maximum lead soldering temperature ( 10 seconds ) 26 0 o c note1: stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recom- mended operating conditions" is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package code operating junction temperature i : - 40 to 85 c handling code assembly material g : halogen and lead free device temperature range package code handling code assembly material tr : tape & reel qb : tdfn 3 x 3 - 10 apw apw 8835 qb : x - date code 8835 xxxxx apw 8835 vin 3 10 en fb 1 vcc 2 gnd 5 9 pgood 7 sw 8 boot tdfn 3 x 3 - 10 ( top view ) gnd gnd 4 6 sw gnd
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 3 a p w 8 8 3 5 t h e r m a l c h a r a c t e r i s t i c s symbol parameter typical value unit q ja junction - to - ambient resistance in free air (note 2) 55 o c/w note 2: q ja is measured with the component mounted on a high effective thermal conductivity test board in free air. symbol parameter range unit v in vin supply voltage 7 .5 ~ 24 v v cc v cc supply voltage 3 ~ 5.5 v v out converter output voltage 0.8 ~ 20 v i out converter output current 0 ~ 3 a v ih_en en high - level input voltage 1.6~5 v v il_en en low - level input volta ge 0~0.4 v t a ambient temperature - 40 ~ 85 o c t j junction temperature - 40 ~ 125 o c r e c o m m e n d e d o p e r a t i n g c o n d i t i o n s ( n o t e 3 ) n o t e 3 : r e f e r t o t h e a p p l i c a t i o n c i r c u i t . e l e c t r i c a l c h a r a c t e r i s t i c s apw8835 symbol parameter test conditions min typ max unit supply current i vcc vcc supply current v fb =0.8v - 1.1 - m a i vcc_sd vcc shutdown supply current v en =0v - - 1 m a power - on - reset (por) vin por voltage threshold v in rising 6.4 6.9 7.4 v vin por voltage hysteresis v in falling - 0.6 - v vcc por voltage threshold v cc rising 2.65 2.8 2.95 v vcc por voltage hysteresis v cc falling - 0.3 - v reference voltage v ref reference voltage - 0.8 - v output voltage accuracy i out =10ma ~3a, v cc = 3~ 5 v , t a = 25 c - 1.5 - +1.5 % oscillator and duty cycle f osc oscillator frequency - 600 - khz maximum converter ? s duty - 90 - % minimum on time - 100 - ns power mosfet high side mosfet resistance i out =3a - 70 105 m w low side mosfet resistance i out =3a - 70 105 m w high side mosfet leakage current v en =0v, v sw =0v , v in =24v - - 10 m a low side mosfet leakage current v en =0v, v sw = 24 v , v in =24v - - 10 m a unless otherwise specified, these specifications apply over v in =12v, v cc =5v, v en =5v. typical values are at t a =25 o c.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 4 a p w 8 8 3 5 e l e c t r i c a l c h a r a c t e r i s t i c s apw8835 symbol parameter test conditions min typ max unit bootstrap power bootstrap switch drop voltage i f = 10ma - 0.2 v boot leakage current v en =0v, v cc= 5v, v in = v sw = 19v, v boot =24v - - 10 m a current - mode pwm converter gm error amplifier tr ansconductance 800 ua/v error amplifier dc gain - 80 - db t d dead time 20 ns protections high side mosfet current - limit - 5.3 - a low side switch current - limit - 1 - a t otp over - temperature trip point - 150 - c over - temperature hys teresis - 20 - c over - voltage protection 130 135 140 %v ref under - voltage protection 45 50 55 %v ref soft - start, enable and input currents t ss soft - start time 0.8 1.5 2 ms enable high level voltage ven rising 1.6 - - v enable low level volta ge ven falling - - 0.4 v power good pgood in from lower (pgood goes high) v out rising 87 90 93 %v out pgood low hysteresis v out falling - 5 - %v out pgood in from higher (pgood goes high) v out falling 122 125 128 %v out pgood high hysteresis v out ri sing - 5 - %v out pgood pull low resistance - 100 - w unless otherwise specified, these specifications apply over v in =12v, v cc =5v, v en =5v. typical values are at t a =25 o c.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 5 a p w 8 8 3 5 p i n d e s c r i p t i o n pin no. name function 1 fb output feedback input. the apw8835 senses the feedback voltage via fb and regulates the voltage at 0.8v. connecting fb with a resistor - divider from the converter?s output sets the output voltage. 2 vcc signa l input. the vcc s upplies the control circuitry, gate driver. connect a ceramic bypass capacitor from vcc to gnd. 3 vin power input. the vin supplies the step - down converter switches. connect a ceramic bypass capacitor from vin to gnd. 4 gnd 5 gnd ground. power and signal groun d. 6 sw 7 sw p ower switching output. the sw is the junction of the high - side and low - side power mosfet to supply power to the output lc filter. 8 boot h igh - side gate driver supply voltage input. the boot suppl ies the voltage to drive the high - s ide n - channel mosfet. 9 pgood p ower good output. this pin is an open - drain logic output that is pulled to the ground when the v fb voltage is out of window . this pin needs a resistor to pull high when pgood signal is used. 10 en enable pin of the pwm con verter. when the en is above high logic level, the devic e is in operation mode. when the en is below low logic level, the device is in shutdown mode. this pin can not be left open. 11 - g nd and exposed pad. connect the exposed pad to the system ground pl an e with large copper area for dissipating heat into the ambient air.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 6 a p w 8 8 3 5 b l o c k d i a g r a m sw gate control v ref fault logics error amplifier fb inhibit gnd por power - on - reset slope compensation current compartor over temperature protection current limit gate driver gate driver gm vin 8 boot 6 , 7 4 , 5 3 1 fb 0 . 8 v ovp otp current sense amplifier loc loc ss ramp , 0 ~ v ref 1 . 5 ms uvp current sense amplifier r bond zero crossing comoparator oscillator vcc 2 vcc vcc 135 % v ref 50 % v ref 87 % v ref 128 % v ref en 10 1 . 6 v 9 pgood fb
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 7 a p w 8 8 3 5 t y p i c a l a p p l i c a t i o n c i r c u i t apw 8835 vin 3 10 gnd 4 , 5 , 11 sw 6 , 7 fb 1 boot 8 v in vout c 1 10 130 m f r 1 75 k r 2 24 k l 1 10 m f 10 nf vcc c 3 1 m f v cc en r 3 100 k 2 pgood 9 r 4 100 k c 4 c 6 c 2 m f
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 8 a p w 8 8 3 5 f u n c t i o n d e s c r i p t i o n main control loop the apw8835 is a constant frequency current mode switching regulator. during normal operation, the inter- nal n-channel power mosfet is turned on each cycle when the oscillator sets an internal rs latch and would be turned off when an internal current comparator (icmp) resets the latch. the peak inductor current at which icmp resets the rs latch is controlled by the voltage on the comp pin, which is the output of the error amplifier (eamp). an external resistive divider connected between vout and ground allows the eamp to receive an output feedback voltage vfb at fb pin. when the load current increases, it causes a slight decrease in vfb relative to the 0.8v reference, which in turn causes the comp volt- age to increase until the average inductor current matches the new load current. vin and vcc power-on-reset (por) enable/shutdown driving en to ground places the apw8835 in shutdown. when in shutdown, the internal n-channel power mosfet turns off, all internal circuitry shuts down and the quies- cent supply current reduces to 0.3 m a. connect a rc net- work from en to gnd to set a turn-on delay that can be used to sequence the output voltages of multiple devices. the apw8835 keeps monitoring the voltage on vin and vcc pin to prevent wrong logic operations which may occur when vin or vcc voltage is not high enough for the internal control circuitry to operate. after the vin, vcc and en voltages exceed their respec- tive voltage thresholds, the ic starts a start-up process and then ramps up the output voltage to the setting of output voltage. c u r r e n t - l i m i t p r o t e c t i o n t h e a p w 8 8 3 5 m o n i t o r s t h e o u t p u t c u r r e n t , f l o w i n g t h r o u g h t h e n - c h a n n e l p o w e r m o s f e t , a n d l i m i t s t h e c u r r e n t p e a k a t c u r r e n t - l i m i t l e v e l t o p r e v e n t l o a d s a n d t h e i c f r o m d a m - a g e s d u r i n g o v e r l o a d , s h o r t - c i r c u i t a n d o v e r - v o l t a g e c o n d i t i o n s . soft-start the apw8835 provides the soft-start function to limit the inrush current. the soft-start time is fixed in 1.5ms. o v e r - t e m p e r a t u r e p r o t e c t i o n ( o t p ) t h e o v e r - t e m p e r a t u r e c i r c u i t l i m i t s t h e j u n c t i o n t e m p e r a - t u r e o f t h e a p w 8 8 3 5 w h e n t h e j u n c t i o n t e m p e r a t u r e e x - c e e d s t j = + 1 5 0 o c , a t h e r m a l s e n s o r t u r n s o f f t h e n - c h a n - n e l p o w e r m o s f e t , a l l o w i n g t h e d e v i c e t o c o o l d o w n . t h e t h e r m a l s e n s o r a l l o w s t h e c o n v e r t e r t o s t a r t a s t a r t - u p p r o c e s s a n d r e g u l a t e t h e o u t p u t v o l t a g e a g a i n a f t e r t h e j u n c t i o n t e m p e r a t u r e c o o l s b y 2 0 o c . t h e o t p d e s i g n e d w i t h a 2 0 o c h y s t e r e s i s l o w e r s t h e a v e r a g e t j d u r i n g c o n - t i n u o u s t h e r m a l o v e r l o a d c o n d i t i o n s , i n c r e a s i n g l i f e t i m e o f t h e a p w 8 8 3 5 . f o l d b a c k f r e q u e n c y t h e f o l d b a c k f r e q u e n c y i s c o n t r o l l e d b y t h e f b v o l t a g e . w h e n t h e f b p i n v o l t a g e i s u n d e r 8 0 % o f r e f e r e n c e ( v r e f ) , t h e f r e q u e n c y o f t h e o s c i l l a t o r w i l l b e r e d u c e d t o 1 1 0 k h z . t h i s l o w e r f r e q u e n c y a l l o w s t h e i n d u c t o r c u r r e n t t o s a f e l y d i s c h a r g e , t h e r e b y p r e v e n t i n g c u r r e n t r u n a w a y . t h e o s c i l l a t o r ? | s f r e q u e n c y w i l l s w i t c h t o i t s d e s i g n e d r a t e w h e n t h e f e e d b a c k v o l t a g e o n f b r i s e s a b o v e t h e r i s i n g f r e q u e n c y f o l d b a c k t h r e s h o l d ( 8 5 % o f v r e f , t y p i c a l ) a g a i n . b o o s t r a p c a p a c i t o r t h e a p w 8 8 3 5 i s a n n - c h a n n e l m o s f e t s t e p d o w n c o n v e r t e r . t h e m o s f e t r e q u i r e s a g a t e v o l t a g e t h a t i s h i g h e r t h a n i n p u t v o l t a g e , t h u s a b o o s t c a p a c i t o r s h o u l d b e c o n n e c t e d b e t w e e n l x a n d b s p i n s t o d r i v e t h e g a t e o f t h e n - c h a n n e l m o s f e t . t y p i c a l b o o s t r a p c a p a c i t o r v a l u e i s 1 0 n f .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 9 a p w 8 8 3 5 f u n c t i o n d e s c r i p t i o n ( c o n t . ) power ok indicator pgood is actively held low in shutdown and soft-start status.in the soft-start process, the pgood is an open- drain. when the soft-start is finished, the pgood is released. in normal operation, the pgood window is from 90% to 125% of the converter reference voltage. when the output voltage has to stay within this window, pgood signal will become high after 0.5ms internal delay. when the output voltage outruns 87% or 128% of the target voltage, pgood signal will be pulled low immediately. in order to prevent false pgood drop, ca- pacitors need to parallel at the output to confine the volt- age deviation with severe load step transient. output under-voltage protection (uvp) in the operational process, if a short-circuit occurs, the output voltage will drop quickly. before the current-limit circuit responds, the output voltage will fall out of the re- quired regulation range. the under-voltage continually monitors the fb voltage after soft-start is completed. if a load step is strong enough to pull the output voltage lower than the under-voltage threshold, the ic shuts down converter?s output. the under-voltage threshold is 50% of the nominal out- put voltage. the under-voltage comparator has a built-in 3ms noise filter to prevent the chips from wrong uvp shutdown being caused by noise. the apw8835 will be latched after under-voltage protection. o v e r - v o l t a g e p r o t e c t i o n ( o v p ) the over-voltage function monitors the output voltage by fb pin. when the fb voltage increases over 135% of the reference voltage due to the high-side mosfet failure or for other reasons, the over-voltage protection compara- tor will force the low-side mosfet gate driver high. this action actively pulls down the output voltage and eventu- ally attempts to blow the internal bonding wires. the apw8835 will be latched after over-voltage protection.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 0 a p w 8 8 3 5 p a c k a g e i n f o r m a t i o n t d f n 3 x 3 - 1 0 note : 1 . followed from jedec mo - 229 veed - 5 . aaa c nx a 3 a 1 b a pin 1 e d k l e e 2 pin 1 corner d 2 d 1 d 1 s y m b o l min . max . 0 . 80 0 . 00 0 . 18 0 . 30 2 . 20 2 . 40 0 . 05 1 . 40 a a 1 b d d 2 e e 2 e l millimeters a 3 0 . 11 ref tdfn 3 x 3 - 10 c 0 . 30 0 . 50 1 . 60 0 . 004 ref min . max . inches 0 . 031 0 . 000 0 . 007 0 . 012 0 . 087 0 . 094 0 . 055 0 . 012 0 . 020 0 . 70 0 . 063 0 . 028 0 . 002 0 . 50 bsc 0 . 020 bsc 0 . 20 0 . 008 k 2 . 90 3 . 10 0 . 114 0 . 122 2 . 90 3 . 10 0 . 114 0 . 122 0 . 08 0 . 003 0 . 044 0 . 92 d 1 1 . 13 0 . 036
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 1 a p w 8 8 3 5 application a h t1 c d d w e1 f 330.0 ? 2.00 50 min. 12.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 12.0 ? 0.30 1.75 ? 0.10 5.5 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tdfn3x3 - 10 4.0 ? 0.10 8.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.5 min. 0.6+0.00 - 0.40 3.30 ? 0.20 3.30 ? 0.20 1.30 ? 0.20 (mm) c a r r i e r t a p e & r e e l d i m e n s i o n s a e 1 a b w f t p0 od0 b a0 p2 k0 b 0 section b-b section a-a od1 p1 h t1 a d d e v i c e s p e r u n i t package type unit quantity tdfn3x3 - 10 tape & reel 3000
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 2 a p w 8 8 3 5 t a p i n g d i r e c t i o n i n f o r m a t i o n t d f n 3 x 3 - 1 0 user direction of feed c l a s s i f i c a t i o n p r o f i l e
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 3 a p w 8 8 3 5 c l a s s i f i c a t i o n r e f l o w p r o f i l e s profile feature sn - pb eutectic assembly pb - free assembly preheat & soak temperature min (t smin ) temperature max (t smax ) time (t smin to t smax ) ( t s ) 100 c 150 c 60 - 120 seconds 150 c 200 c 60 - 1 2 0 seconds average ramp - up rate (t smax to t p ) 3 c/second ma x. 3 c/second max. liquidous temperature ( t l ) time at l iquidous (t l ) 183 c 60 - 150 seconds 217 c 60 - 150 seconds peak package body temperature (t p ) * see classification temp in table 1 see classification temp in table 2 time (t p ) ** within 5 c of the spe cified c lassification t emperature ( t c ) 2 0 ** seconds 3 0 ** seconds average r amp - down rate (t p to t smax ) 6 c/second max. 6 c/second max. time 25 c to p eak t emperature 6 minutes max. 8 minutes max. * tolerance for peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. ** tolerance for time at peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. table 2. pb - free process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 350 - 2000 volume mm 3 >2000 <1.6 mm 260 c 260 c 260 c 1.6 mm ? 2.5 mm 260 c 250 c 245 c 3 2.5 mm 250 c 245 c 245 c table 1. snpb eutectic process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 3 350 <2.5 mm 235 c 22 0 c 3 2.5 mm 220 c 220 c test item method description solderability jesd - 22, b102 5 sec, 245 c holt jesd - 22, a108 1000 hrs, bias @ t j =125 c pct jesd - 22, a102 168 hrs, 100 % rh, 2atm , 121 c tct jesd - 22, a104 500 cycles, - 65 c~150 c hbm mil - std - 883 - 3015.7 vhbm ? 2kv mm jesd - 22, a1 15 vmm ? 200v latch - up jesd 78 10ms, 1 tr ? 100ma r e l i a b i l i t y t e s t p r o g r a m
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 1 - s e p . , 2 0 1 3 w w w . a n p e c . c o m . t w 1 4 a p w 8 8 3 5 c u s t o m e r s e r v i c e a n p e c e l e c t r o n i c s c o r p . head office : no.6, dusing 1st road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 t a i p e i b r a n c h : 2 f , n o . 1 1 , l a n e 2 1 8 , s e c 2 j h o n g s i n g r d . , s i n d i a n c i t y , t a i p e i c o u n t y 2 3 1 4 6 , t a i w a n t e l : 8 8 6 - 2 - 2 9 1 0 - 3 8 3 8 f a x : 8 8 6 - 2 - 2 9 1 7 - 3 8 3 8

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